This doesn't quite count as a bug.
--------------------------------------------------
module hey;
initial $write("[%0d] <- should *not* be padded\n",$time);
endmodule
--------------------------------------------------
On all the verilog simulators I've used, the above fits the $time
into the smallest possible space. I'm seeing:
[ 0] <- should *not* be padded
And expect:
[0] <- should *not* be padded